Signal Name Total Product Terms Product Terms Location Pin Number PinType Pin Use GCK
(unused) 0   MC1 156 I/O    
(unused) 0   MC2 155 I/O    
(unused) 0   MC3 154 I/O    
(unused) 0   MC4 153 I/O    
(unused) 0   MC5   (b)    
(unused) 0   MC6   (b)    
(unused) 0   MC7   (b)    
(unused) 0   MC8   (b)    
(unused) 0   MC9   (b)    
(unused) 0   MC10   (b)    
N_PZ_950 2  5 6 MC11   (b) (b)  
FSM/SHELL1_DSP_SM_2/ramp_cnt<3>56 1  30 MC12   (b) (b)  
FSM/SHELL1_DSP_SM_2/ramp_cnt<5>54 2  0 4 MC13   (b) (b)  
(unused) 0   MC14 151 I/O    
FSM/SHELL1_DSP_SM_2/ramp_cnt<6>54 4  0 1 2 3 MC15   (b) (b)  
(unused) 0   MC16 150 I/O    

Signals Used By Logic in Function Block
  1. FSM/SHELL1_DSP_SM_2/CHIP_ACQUIRE
  2. FSM/SHELL1_DSP_SM_2/CHIP_ADV_0
  3. FSM/SHELL1_DSP_SM_2/CHIP_ADV_1
  4. FSM/SHELL1_DSP_SM_2/CHIP_IDLE
  5. FSM/SHELL1_DSP_SM_2/CHIP_INIT
  6. FSM/SHELL1_DSP_SM_2/CHIP_LOAD_STATUS
  7. FSM/SHELL1_DSP_SM_2/CHIP_READ2
  8. FSM/SHELL1_DSP_SM_2/CHIP_READ3
  9. FSM/SHELL1_DSP_SM_2/CHIP_READ_0
  10. FSM/SHELL1_DSP_SM_2/CHIP_READ_1
  11. FSM/SHELL1_DSP_SM_2/CHIP_READ_5
  12. FSM/SHELL1_DSP_SM_2/CHIP_READ_6
  13. FSM/SHELL1_DSP_SM_2/CHIP_SAMPLE0
  14. FSM/SHELL1_DSP_SM_2/CHIP_SAMPLE0_1
  15. FSM/SHELL1_DSP_SM_2/CHIP_TRANSMIT
  16. FSM/SHELL1_DSP_SM_2/CLR_0
  17. FSM/SHELL1_DSP_SM_2/CLR_0_1
  18. FSM/SHELL1_DSP_SM_2/CLR_1
  19. FSM/SHELL1_DSP_SM_2/CLR_1_1
  20. FSM/SHELL1_DSP_SM_2/CLR_2
  21. FSM/SHELL1_DSP_SM_2/CLR_2_1
  22. FSM/SHELL1_DSP_SM_2/PRE_RAMP
  23. FSM/SHELL1_DSP_SM_2/PRE_READ
  24. FSM/SHELL1_DSP_SM_2/RAMP_S0
  25. FSM/SHELL1_DSP_SM_2/RAMP_S1
  26. FSM/SHELL1_DSP_SM_2/RAMP_S2
  27. FSM/SHELL1_DSP_SM_2/XMIT_END
  28. FSM/SHELL1_DSP_SM_2/XMIT_SLEEP
  29. FSM/SHELL1_DSP_SM_2/_n0090<5>
  30. FSM/SHELL1_DSP_SM_2/chip_read_5_1
  31. FSM/SHELL1_DSP_SM_2/ramp_cnt5
  32. FSM/SHELL1_DSP_SM_2/ramp_cnt6
  33. FSM/SHELL1_DSP_SM_2/ramp_cnt<3>50
  34. N_PZ_1183
  35. N_PZ_787
  36. N_PZ_849
  37. N_PZ_927
  38. status_reg_data<3>